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M32C/86 데이터시트(PDF) 327 Page - Renesas Technology Corp |
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M32C/86 데이터시트(HTML) 327 Page - Renesas Technology Corp |
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327 / 505 page ![]() Page 304 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 22. Intelligent I/O (Communication Function) ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M Table 22.21 Clock Settings (Communication Unit 1) Transfer Clock(3) G1MR Register CCS Register CKDIR Bit CCS2 Bit CCS3 Bit fBT1 00 0 2( n+2) n: Setting value of the G1PO0 register 000116 to FFFD16 NOTES: 1. Transmit clock is generated in phase-delayed waveform output mode of the channel 3 waveform generating function. 2. Received clock is generated when phase-delayed waveform mode of the channel 2 waveform gener- ating function and the channel 2 time measurement function is simultaneously performed. 3. The transfer clock must be fBT1 divided by six or more. Table 22.22 Register Settings in UART Mode (Communication Unit 1) Register Bit Function G1BCR0 BCK1, BCK0 Set to "112" (f1) DIV4 to DIV0 Select divide ratio of count source IT Set to "0" G1BCR1 7 to 0 Set to "0001 00102" G1POCR0 7 to 0 Set to "0000 01112" G1POCR2 7 to 0 Set to "0000 01102" G1POCR3 7 to 0 Set to "0000 00102" G1TMCR2 7 to 0 Set to "0000 00102" G1PO0 15 to 0 Set bit rate = transfer clock frequency G1PO3 15 to 0 Set to a value smaller than the G1PO0 register G1FS FSC3 to FSC0 Set to "01002" G1FE IFE3 to IFE0 Set to "11012" G1MR GMD1, GMD0 Set to "002" CKDIR Set to "0" STPS Select stop bit length PRY, PRYE Select either parity enabled or disabled and either odd parity or even parity UFORM Select either the LSB first or MSB first IRS Select what causes the receive interrupt to be generated G1CR TI Transmit buffer empty flag TXEPT Transmit register empty flag RI Receive complete flag TE Set to "1" to enable transmission and reception RE Set to "1" to enable reception IPOL Set to "1" OPOL Set to "1" G1TB 7 to 0 Write data to be transmitted G1RB 15 to 0 Received data and error flag are stored CCS CCS3, CCS2 Set to "002" Table 22.23 Pin Settings in UART Mode Port Function Setting Register(1) Name PS1 Register PSL1 Register PSC Register PD7 Register IPS Register P73 ISTxD1 output PS1_3 = 1 PSL1_3 = 0 PSC_3 = 1 - - G1POCR0 P75 ISRxD1 input PS1_5 = 0 - - PD7_5 = 0 IPS1 = 0 - NOTES: 1. Set the MOD2 to MOD0 bits in the corresponding register to "1112" (output from communication function used). fBT1 2 x (setting value + 2) (1, 2) |
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