R8CSLASH15 datasheet(155/277 Pages) RENESAS

155 / 277 page

R8C/14 Group, R8C/15 Group

15. Clock Synchronous Serial I/O with Chip Select (SSU)

Rev.2.10

Jan 19, 2006

Page 143 of 253

REJ09B0164-0210

Figure 15.3

SSCRL Register

SS Control Register L

(4)

Symbol

Address

After Reset

SSCRL

00B9h

01111101b

Bit Symbol

Bit Name

Function

NOTES :

4. Refer to 20.6.1 Access Registers Associated w ith SSU for accessing registers associated w ith SSU.

—

Do not w rite to the SOL bit during the data transfer.

The data output after the serial data is output can be changed w hen w riting to the SOL bit before or after transfer.

Set the SOLP bit to “0” and w rite to the SOLP and SOL bits by the MOV instruction w hen w riting to the SOL bit.

SSCRH, SSCRL, SSMR, SSER, SSSR, SSMR2, SSTDR and SSRDR registers.

SOL

Serial Data Output

Value Setting Bit

When read,

0 : The last bit of the serial data output is set to “L”

1 : The last bit of the serial data output is set to “H”

When w rite,(2,3)

0 : The data outputs “L” after the serial data output

1 : The data outputs “H” after the serial data output

—

(b6)

Nothing is assigned. When w rite, set to “0”.

When read, its content is “1”.

—

(b7)

Nothing is assigned. When w rite, set to “0”.

When read, its content is “0”.

—

(b3-b2)

Nothing is assigned. When w rite, set to “0”.

When read, its content is “1”.

—

SOLP

SOL Write Protect Bit(2) The output level can be changed by the SOL bit w hen

“0” w hen this bit is set to “0”.

Writing “1” is disabled. When read, its content is “1”.

b7 b6 b5 b4 b3 b2 b1 b0

—

(b0)

—

Nothing is assigned. When w rite, set to “0”.

When read, its content is “1”.

SRES

SSU Control Part Reset

Bit

When this bit is set to “1”, the SSU control part and

SSTRSR register are reset.

The values of the registers(1) in the SSU register are

maintained.

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