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RESET

7906 Group User’s Manual Rev.2.0

3-3

Bit name

Bit

Processor mode register 0 (Address 5E16)

Function

At reset

R/W

Processor mode bits

Interrupt priority detection time

select bits

Software reset bit

Fix this bit to “0.”

b7 b6 b5 b4 b3 b2 b1 b0

0 0 : Single-chip mode

0 1 : Do not select.

1 0 : Do not select.

1 1 : Do not select.

b1 b0

0 0 : 7 cycles of fsys

0 1 : 4 cycles of fsys

1 0 : 2 cycles of fsys

1 1 : Do not select.

b5 b4

The microcomputer is reset by writing “1” to this

bit. The value is “0” at reading.

Fig. 3.1.2 Structure of processor mode register 0

3.1.2 Software reset

The microcomputer initializes pins, CPU, and SFR area just as in the case of hardware reset (Refer to

sections “3.2 Pin state” and “3.3 State of internal area”) by writing “1” to the software reset bit. (See

Figure 3.1.2.)

After initialization is completed, the microcomputer performs “Internal processing sequence after reset.”

(Refer to section “3.4 Internal processing sequence after reset.”) After that, it executes a program

beginning with the address which has been set into the reset vector addresses (addresses FFFE16 and

FFFF16).

3.1 Reset operation

X: It may be either “0” or “1”.

Any of these bits may be either “0” or “1.”

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