전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

PCM3168APAPR 데이터시트(PDF) 28 Page - Texas Instruments

Click here to check the latest version.
부품명 PCM3168APAPR
상세설명  24-Bit, 96-kHz/192-kHz, 6-In/8-Out Audio Codec with Differential Input/Output
PDF  66 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

PCM3168APAPR 데이터시트(HTML) 28 Page - Texas Instruments

Back Button PCM3168APAPR Datasheet HTML 24Page - Texas Instruments PCM3168APAPR Datasheet HTML 25Page - Texas Instruments PCM3168APAPR Datasheet HTML 26Page - Texas Instruments PCM3168APAPR Datasheet HTML 27Page - Texas Instruments PCM3168APAPR Datasheet HTML 28Page - Texas Instruments PCM3168APAPR Datasheet HTML 29Page - Texas Instruments PCM3168APAPR Datasheet HTML 30Page - Texas Instruments PCM3168APAPR Datasheet HTML 31Page - Texas Instruments PCM3168APAPR Datasheet HTML 32Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 66 page
background image
BCKAD/DA
(Output)
LRCKAD/DA
(Output)
DOUT1/2/3
DIN1/2/3/4
t
DOD
t
LRD
1.4V
0.5
VDD
´
0.5
VDD
´
0.5
VDD
´
t
BCH
t
BCL
t
BCY
t
DIS
t
DIH
t
LRW
PCM3168A
PCM3168A-Q1
SBAS452 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com
Timing Requirements for Figure 44(1)
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNIT
BCKAD cycle time
75
ns
tBCY
BCKDA cycle time
40
ns
BCKAD pulse width high
35
ns
tBCH
BCKDA pulse width high
15
ns
BCKAD pulse width low
35
ns
tBCL
BCKDA pulse width low
15
ns
LRCKAD/DA pulse width high (DSP format)
tBCY
tLRW
LRCKAD/DA pulse width high (TDM format)
tBCY
1/fS – tBCY
tLRS
LRCKAD/DA setup time to BCKAD/DA rising edge
10
ns
tLRH
LRCKAD/DA hold time to BCKAD/DA rising edge
10
ns
tDIS
DIN1/2/3/4 setup time to BCKDA rising edge
10
ns
tDIH
DIN1/2/3/4 hold time to BCKDA rising edge
10
ns
tDOD
DOUT1/2/3 delay time from BCKAD falling edge
0
30
ns
(1)
Load capacitance of output is 20 pF.
Figure 45. Audio Interface Timing Requirements for DSP and TDM Data Formats (Master Mode)
Timing Requirements for Figure 45(1)
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNIT
BCKAD/DA cycle time (DSP format)
1/(64 fS)
tBCY
BCKAD/DA cycle time (TDM format, single rate)
1/(256 fS)
BCKAD/DA cycle time (TDM format, dual rate)
1/(128 fS)
tBCH
BCKAD/DA pulse width high
0.4 tBCY
0.5 tBCY
0.6 tBCY
tBCL
BCKAD/DA pulse width low
0.4 tBCY
0.5 tBCY
0.6 tBCY
LRCKAD/DA pulse width high (DSP format)
tBCY
tLRW
LRCKAD/DA pulse width high (TDM format)
1/(2 fS)
tLRD
LRCKAD/DA delay time from BCKAD/DA falling edge
–10
20
ns
tDIS
DIN1/2/3/4 setup time to BCKDA rising edge
10
ns
tDIH
DIN1/2/3/4 hold time to BCKDA rising edge
10
ns
tDOD
DOUT1/2/3 delay time from BCKAD falling edge
–10
20
ns
(1)
Load capacitance of output is 20 pF.
28
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): PCM3168A PCM3168A-Q1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com