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ML5805DM 데이터시트(PDF) 23 Page - RF Micro Devices

부품명 ML5805DM
상세설명  5.8GHz Variable Data Rate FSK Transceiver with Integrated PA
PDF  36 Pages
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제조업체  RFMD [RF Micro Devices]
홈페이지  http://www.rfmd.com
Logo RFMD - RF Micro Devices

ML5805DM 데이터시트(HTML) 23 Page - RF Micro Devices

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ML5805
RF MICRO DEVICES®, RFMD®, OPTIMUM TECHNOLOGY MATCHING®, ENABLING WIRELESS CONNECTIVITY™, POWERSTAR®, POLARIS™ TOTAL RADIO™ ULTIMATEBLUE™ AND FASTWAVE™ ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY
BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. ©2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 · FOR SALES OR TECHNICAL
REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
23
REGISTER 0
Register 0 is a special register because some of the hardware is controlled directly from this register. Since those
specific bits are connected physically to active hardware, they must always be written first after power on. If Register 0
is not initialized first by the base band hardware, the ML5805 will not operate correctly.
Bit
Variable
Default Definition
15:13
TCMOD
0
Selects one of eight possible data slicer time constant combinations.
Value
Definition
0
Forces 300
μs
1
Forces 6
μs
2
Forces 3
μs
3
Forces 2
μs
4
External selection between 300
μs and 6μs
5
External selection between 300
μs and 3μs
6
Use Unique Word Detect mode and forces 6
μs
7
Use Unique Word Detect mode and forces 3
μs
12:10
RATE
0
Selects one of eight possible bit rate combinations. Selected bit rates are
dependent on external crystal frequency supplied
Value
Definition
0
576kbps (@13.824MHz)
1
1,152kbps (@13.824MHz)
2
1,536kbps (@12.288MHz)
3
1,755kbps (@12.288MHz)
4
2,048kbps (@12.288MHz)
5
Not defined.
6
Not defined.
7
Not defined.
9
UWDPOL
0
1: invert the default DECT Unique Word (UWD) pattern
0: use the default DECT Unique Word (UWD) pattern
8
PLLULACT
1
Value
Definition
0
PA will always turn on
1
If the PLL does not lock, the PA does not turn on
7
(spare)
0
Spare bit
6
RESERVED
0
RESERVED
5:4
RESERVED
0
RESERVED
3:0
RESERVED
0xE
RESERVED



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