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ARMV4T 데이터시트(PDF) 13 Page - Actel Corporation |
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ARMV4T 데이터시트(HTML) 13 Page - Actel Corporation |
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13 / 30 page ![]() CoreMP7 v2.6 13 CoreMP7 Variants There are two implementations of CoreMP7 (Core Only and Core Plus Debug). The utilization and performance of the variants are shown in Table 1 on page 2. Core Plus Debug The Core Plus Debug variant is configured with all features of the ARM7TDMI-S. The variant incorporates the full debug functionality of the ARM7TDMI-S and is fully compliant with RealView RVDS, RVDK, and other ARM software debug tools. Core Only The Core Only variant has the same features as the Core Plus Debug variant except that it does not include the ICE-RT debug block or the TAP controller, which reduces the size of the core. This means that the standard debug tools cannot be used with this variant of CoreMP7. No Debug This is the most obvious characteristic of the Core Only variant. To reduce area, the Debug EmbeddedICE-RT macrocell, the EmbeddedICE-RT TAP controller, and the scan logic have been optimized out. This means that standard software debug tools cannot be used when this variant of the CoreMP7 is instantiated. Users can employ the Core Plus Debug variant for development, and when the application has been fully tested and debugged, the Core Only variant can be instantiated to reduce area in the final shipping product. No Coprocessor Interface The coprocessor interface is a rarely used feature in ARM7 family microprocessors and has been removed from CoreMP7 to minimize area. Little Endian Only Most microprocessor-based systems use Little Endian byte ordering. The option of selecting Big Endian has been removed from CoreMP7 to minimize area. On-Chip RAM Consumed by Register Block To minimize the area, the CoreMP7 variants map the processor register block into on-chip RAM. RAM blocks used to implement CoreMP7 registers are no longer available for use in user designs. Figure 8 • ARM7 TDMI-S Core ARM7 CPU Coprocessor Signals Data Address Bus Control Signals Debug Interface Debug JTAG Signals ARM7TDMI-S Core Debug EmbeddedICE-RT (Debug) TAP Controller |
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