PCI1221 datasheet(77/123 Pages) TI

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serial bus data register

Bit

Name

Serial bus data

Type

R/W

Default

Serial bus data

Type:

Read/write

Offset:

B0h (function 0)

Default:

00h

Description: The serial bus data register is for programmable serial bus byte reads and writes. This register

represents the data when generating cycles on the serial bus interface. To write a byte, this

with the byte address, the serial bus slave address must be programmed with both the 7-bit

slave address, and the read/write indicator bit must be reset.

On byte reads, the byte address is programmed into the serial bus index register

, the serial

bus slave address must be programmed with both the 7-bit slave address and the read/write

indicator bit must be set, and the REQBUSY bit in the serial bus control and status register

must be polled until clear. Then the contents of this register are valid read data from the serial

bus interface. See Table 34 for a complete description of the register contents.

Table 34. Serial Bus Data Register

BIT

SIGNAL

TYPE

FUNCTION

7-0

SBDATA

R/W

Serial bus data. This bit field represents the data byte in a read or write transaction on the serial interface.

On reads, the REQBUSY bit must be polled to verify that the contents of this register are valid.

serial bus index register

Bit

Name

Serial bus index

Type

R/W

Default

Serial bus index

Type:

Read/write

Offset:

B1h (function 0)

Default:

00h

Description: The serial bus index register is for programmable serial bus byte reads and writes. This

write a byte, the serial bus data register must be programmed with the data, this register must

be programmed with the byte address, and the serial bus slave address must be programmed

with both the 7-bit slave address and the read/write indicator.

On byte reads, the word address is programmed into this register

, the serial bus slave address

must be programmed with both the 7-bit slave address and the read/write indicator bit must be

set, and the REQBUSY bit in the serial bus control and status register must be polled until

clear. Then the contents of the serial bus data register are valid read data from the serial bus

interface. See Table 35 for a complete description of the register contents.

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