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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MB91F613 데이터시트(PDF) 90 Page - fujitsu semiconductor |
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MB91F613 데이터시트(HTML) 90 Page - fujitsu semiconductor |
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90 / 104 page  MB91610 Series 90 DS07-16907-2E (Continued) *2 : The current when the CPU is in stop mode and the A/D converter is not operating. *3 : Compare time = {(CT + 1) × 10 + 4} × peripheral clock (PCLK) period. (CT indicates compare time setting bits.) The condition of the minimum compare time is when CT = 1 and PCLK = 33 MHz. The output impedance of the external circuit connected to the analog input affects the sampling time of the A/D converter. Design the output impedance of the output circuit such that the required sampling time is less than the value of TS calculated from the following equation. (Equation 1) Ts = (Rin + Rext) × Cin × 8 Ts : Sampling time Rin : Input resistance of A/D = 5.3 kΩ Cin : Input capacitance of A/D = 8.5 pF Rext : Output impedance of external circuit If the sampling time is set as 600 ns, 600 ns ≥ (5.3 kΩ + Rext) × 8.5 pF × 8 ∴Rext ≤ 3.5 kΩ And the impedance of the external circuit therefore needs to be 3.5 k Ω or less. Rin Cin Rext Analog signal source Comparator Rin Cin Approx. 5.3 k Ω Approx. 8.5 pF AN0 to AN7 Analog input pin |
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