MFRC522 datasheet(65/96 Pages) NXP

65 / 96 page

MFRC522_33

Product data sheet

PUBLIC

Rev. 3 — 26 October 2009

112133

65 of 96

NXP Semiconductors

MFRC522

Contactless reader IC

9.3.4.10

TestDAC1Reg register

Deﬁnes the test value for TestDAC1.

9.3.4.11

TestDAC2Reg register

Deﬁnes the test value for TestDAC2.

9.3.4.12

TestADCReg register

Shows the values of ADC I and Q channels.

9.3.4.13

Reserved register 3Ch

Functionality reserved for production test.

Table 135. TestDAC1Reg register (address 39h); reset value: xxh bit allocation

Bit

Symbol

reserved

TestDAC1[5:0]

Access

R/W

Table 136. TestDAC1Reg register bit descriptions

Bit

Symbol

Description

reserved

reserved for production tests

reserved

reserved for future use

5 to 0

TestDAC1[5:0] deﬁnes the test value for TestDAC1

output of DAC1 can be routed to AUX1 by setting value

AnalogSelAux1[3:0] to 0001b in the AnalogTestReg register

Table 137. TestDAC2Reg register (address 3Ah); reset value: xxh bit allocation

Bit

Symbol

reserved

TestDAC2[5:0]

Access

R/W

Table 138. TestDAC2Reg register bit descriptions

Bit

Symbol

Description

7 to 6

reserved

reserved for future use

5 to 0

TestDAC2[5:0] deﬁnes the test value for TestDAC2

output of DAC2 can be routed to AUX2 by setting value

AnalogSelAux2[3:0] to 0001b in the AnalogTestReg register

Table 139. TestADCReg register (address 3Bh); reset value: xxh bit allocation

Bit

Symbol

ADC_I[3:0]

ADC_Q[3:0]

Access

Table 140. TestADCReg register bit descriptions

Bit

Symbol

Description

7 to 4

ADC_I[3:0]

ADC I channel value

3 to 0

ADC_Q[3:0]

ADC Q channel value

MFRC522 데이터시트(PDF) 65 Page - NXP Semiconductors

MFRC522 데이터시트(HTML) 65 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

데이터시트 다운로드

링크 URL