AT45DB321D-CU datasheet(16/57 Pages) ATMEL

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3597N–DFLASH–04/09

AT45DB321D

After the last data byte has been clocked in, the CS pin must be deasserted to initiate the inter-

nally self-timed program cycle. The programming of the Sector Protection Register should take

place in a time of tP, during which time the Status Register will indicate that the device is busy. If

the device is powered-down during the program cycle, then the contents of the Sector Protection

If the proper number of data bytes is not clocked in before the CS pin is deasserted, then the

protection status of the sectors corresponding to the bytes not clocked in can not be guaranteed.

For example, if only the first two bytes are clocked in instead of the complete 62 bytes, then the

protection status of the last 62 sectors cannot be guaranteed. Furthermore, if more than

64 bytes of data is clocked into the device, then the data will wrap back around to the beginning

of the register. For instance, if 65 bytes of data are clocked in, then the 65th byte will be stored at

byte location 0 of the Sector Protection Register.

If a value other than 00H or FFH is clocked into a byte location of the Sector Protection Register,

then the protection status of the sector corresponding to that byte location cannot be guaran-

teed. For example, if a value of 17H is clocked into byte location 2 of the Sector Protection

The Sector Protection Register can be reprogrammed while the sector protection enabled or dis-

abled. Being able to reprogram the Sector Protection Register with the sector protection enabled

allows the user to temporarily disable the sector protection to an individual sector rather than dis-

abling sector protection completely.

The Program Sector Protection Register command utilizes the internal SRAM buffer 1 for pro-

cessing. Therefore, the contents of the buffer 1 will be altered from its previous state when this

command is issued.

Figure 9-3.

Program Sector Protection Register

Command

Byte 1

Byte 2

Byte 3

Byte 4

Program Sector Protection Register

3DH

2AH

7FH

FCH

Data Byte

Opcode

Byte 1

Opcode

Byte 2

Opcode

Byte 3

Opcode

Byte 4

Data Byte

n + 1

Data Byte

n + 63

Each transition

represents 8 bits

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