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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ATXMEGA64A1 데이터시트(PDF) 48 Page - ATMEL Corporation |
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ATXMEGA64A1 데이터시트(HTML) 48 Page - ATMEL Corporation |
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48 / 99 page  48 8067I–AVR–04/09 XMEGA A1 28. PDI - Program and Debug Interface 28.1 Features • PDI - Program and Debug Interface (Atmel proprietary 2-pin interface) • JTAG Interface (IEEE std. 1149.1 compliant) • Boundary-scan capabilities according to the IEEE Std. 1149.1 (JTAG) • Access to the OCD system • Programming of Flash, EEPROM, Fuses and Lock Bits 28.2 Overview The programming and debug facilities are accessed through the JTAG and PDI physical inter- faces. The PDI physical interface uses one dedicated pin together with the Reset pin, and no general purpose pins are used. JTAG uses four general purpose pins on PORTB. The PDI is an Atmel proprietary protocol for communication between the microcontroller and Atmel’s or third party development tools. 28.3 JTAG interface The JTAG physical layer handles the basic low-level serial communication over four I/O lines named TMS, TCK, TDI, and TDO. It complies to the IEEE Std. 1149.1 for test access port and boundary scan. |
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