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MAXQ3183-RAN+ 데이터시트(PDF) 96 Page - Maxim Integrated Products |
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MAXQ3183-RAN+ 데이터시트(HTML) 96 Page - Maxim Integrated Products |
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96 / 102 page ![]() Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect 96 ______________________________________________________________________________________ Checksum (CHKSUM) (0x066) This register contains the calculated 16-bit arithmetic checksum over critical configuration and calibration registers. It is updated on every DSP cycle. In use, the administrative processor records the value in the CHKSUM register and then checks it periodically to verify that no configuration or calibration registers have changed. The MAXQ3183 sets the CHSCH bit when this register’s value changes. The registers included in the checksum calculation include the following: Bit: 15 14 13 12 11 10 9 8 Name: Checksum High Byte Reset: Bit: 7 6 5 4 3 2 1 0 Name: Checksum Low Byte Reset: SYS_KHZ THR2 R_ADCRATE A.I_GAIN B.I_GAIN C.I_GAIN VOLT_CC REJ_NS R_ADCACQ A.V_GAIN B.V_GAIN C.V_GAIN AMP_CC AVG_NS R_SPICF A.E_GAIN B.E_GAIN C.E_GAIN PWR_CC AVG_C ISUMLVL A.EF_GAIN B.EF_GAIN C.EF_GAIN ENR_CC HPF_C COM_TIMO A.OFFS_HI B.OFFS_HI C.OFFS_HI CYCNT B0FUND ACC_TIMO A.GAIN_LO B.GAIN_LO C.GAIN_LO PLSCFG1 OCLVL I1THR A.OFFS_LO B.OFFS_LO C.OFFS_LO PLSCFG2 OVLVL I2THR A.PA0 B.PA0 C.PA0 PLS1_WD UVLVL ZC_LPF A.PA1 B.PA1 C.PA1 THR1 NOLOAD N.GAIN A.PA2 B.PA2 C.PA2 PLS2_WD R_ACFG TEMP_CC |
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