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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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WM8170 데이터시트(PDF) 8 Page - Wolfson Microelectronics plc |
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WM8170 데이터시트(HTML) 8 Page - Wolfson Microelectronics plc |
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8 / 41 page  WM8170 Product Preview Rev 1.0 WOLFSON MICROELECTRONICS LTD PP Rev 1.0 March 2000 8 OUTPUT DATA OEB DCLK SHD D[9:0], RETIME=0 D[9:0], RETIME=1 PTDO, RETIME=0 PTDO, RETIME=1 t PER t CKL t CKH t SHDC t SHDO t SHPT t DCDO t DCPT t PEZ t PZE Figure 2 Output Data Timing Diagram Test Characteristics CVDD = AVDD = DVDD = 3.3V, AGND = DGND = CGND = 0V, RISET=15k Ω , TA = 0oC to +70oC, unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT DCLK period tPER 47.6 ns DCLK high tCKH 19 ns DCLK low tCKL 19 ns Output propagation delay, RETIME = 0, SHD trailing edge to D[9:0] out tSHDO 23.0 ns Output propagation delay, RETIME = 1, DCLK leading edge to D[9:0] out tDCDO 11.2 ns Trailing edge of SHD to leading edge of DCLK tSHDC ns Output disable time, OEB rising to D[9:0] and PTDO tristate tPEZ 8.3 ns Output enable time, OEB falling to D[9:0] and PTDO out tPZE 6.8 ns PTDO propagation delay, RETIME = 0, SHD trailing edge to PTDO out tSHPT ns PTDO propagation delay, RETIME=1, DCLK leading edge to PTDO out tDCPT ns |
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