BD9104FVM datasheet(11/18 Pages) ROHM

11 / 18 page

BD9102FVM, BD9104FVM, BD9106FVM

Technical Note

11/17

www.rohm.com

2009.05 - Rev.A

●

Switching regulator efficiency

Efficiency ŋ may be expressed by the equation shown below:

Efficiency may be improved by reducing the switching regulator power dissipation factors PDα as follows:

Dissipation factors:

1) ON resistance dissipation of inductor and FET：PD(I

2R)

2) Gate charge/discharge dissipation：PD(Gate)

3) Switching dissipation：PD(SW)

4) ESR dissipation of capacitor：PD(ESR)

5) Operating current dissipation of IC：PD(IC)

1)PD(I

2R)=IOUT2×(RCOIL×RON) (RCOIL[Ω]：DC resistance of inductor, RON[Ω]：ON resistance of FET

IOUT[A]：Output current.)

2)PD(Gate)=Cgs×f×V (Cgs[F]：Gate capacitance of FET,f[H]：Switching frequency,V[V]：Gate driving voltage of FET)

4)PD(ESR)=IRMS

2×ESR (IRMS[A]：Ripple current of capacitor,ESR[Ω]：Equivalent series resistance.)

5)PD(IC)=Vin×ICC (ICC[A]：Circuit current.)

●

Consideration on permissible dissipation and heat generation

As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is

needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input

voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation

must be carefully considered.

For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered.

Because the conduction losses are considered to play the leading role among other dissipation mentioned above including

gate charge/discharge dissipation and switching dissipation.

P=IOUT

2×(RCOIL+RON)

RON=D×RONP+(1-D)RONN

D：ON duty (=VOUT/VCC)

RCOIL：DC resistance of coil

RONP：ON resistance of P-channel MOS FET

RONN：ON resistance of N-channel MOS FET

IOUT：Output current

If VCC=5V, VOUT=3.3V, RCOIL=0.15Ω, RONP=0.35Ω, RONN=0.25Ω

IOUT=0.8A, for example,

D=VOUT/VCC=3.3/5=0.66

RON=0.66×0.35+(1-0.66)×0.25

=0.231+0.085

=0.316[Ω]

P=0.8

2×(0.15+0.316)

≒

298[mV]

As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration

on the dissipation as above, thermal design must be carried out with sufficient margin allowed.

η=

VOUT×IOUT

Vin×Iin

×100[%]=

POUT

×100[%]=

POUT

POUT+PDα

×100[%]

Ambient temperature:Ta [℃]

Fig.49 Thermal derating curves

Vin

2×CRSS×IOUT×f

IDRIVE

3)PD(SW)=

(CRSS[F]：Reverse transfer capacitance of FET,IDRIVE[A]：Peak current of gate.)

200

400

600

800

1000

②

387.5mW

①

587.4mW

①

using an IC alone

θj-a=322.6℃/W

②

mounted on glass epoxy PCB

θj-a=212.8℃/W

100

125

150

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