BD9102FVM, BD9104FVM, BD9106FVM

Technical Note

16/17

www.rohm.com

2009.05 - Rev.A

© 2009 ROHM Co., Ltd. All rights reserved.

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Notes for use

1. Absolute Maximum Ratings

While utmost care is taken to quality control of this product, any application that may exceed some of the absolute

maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken,

short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the

absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses.

2. Electrical potential at GND

GND must be designed to have the lowest electrical potential In any operating conditions.

3. Short-circuiting between terminals, and mismounting

When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may

result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and

power supply or GND may also cause breakdown.

4.Operation in Strong electromagnetic field

Be noted that using the IC in the strong electromagnetic radiation can cause operation failures.

5. Thermal shutdown protection circuit

Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to

protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be

used thereafter for any operation originally intended.

6. Inspection with the IC set to a pc board

If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the

capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper

grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the

inspection process, be sure to turn OFF the power supply before it is connected and removed.

7. Input to IC terminals

This is a monolithic IC with P

N-layer of each element form a P-N junction, and various parasitic element are formed.

If a resistor is joined to a transistor terminal as shown in Fig 59:

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P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or

GND>Terminal B (at transistor side); and

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if GND>Terminal B (at NPN transistor side),

a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode.

The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits,

and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such

manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in

activation of parasitic elements.

Fig.59 Simplified structure of monorisic IC

8. Ground wiring pattern

If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND

pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that

resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the

small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.

(Pin A)

P+

P+

N

N

N

P

P substrate

Parasitic diode

GND

GND

Parasitic diode or transistor

N

P

N

C

(Pin B)

B

E

GND

P+

P+

N

N

Resistance

Transistor (NPN)

(Pin B)

C

E

B

GND

(Pin A)

GND

P substrate

Parasitic diode

Parasitic diode or transistor