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P89LPC970FDH 데이터시트(PDF) 18 Page - NXP Semiconductors |
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P89LPC970FDH 데이터시트(HTML) 18 Page - NXP Semiconductors |
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18 / 66 page ![]() xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x [1] Extended SFRs are physically located on-chip but logically located in external data memory address space (XDATA). The MOVX A,@DPTR and MOVX @DPTR,A instructions are used to access these extended SFRs. [2] The BOICFG2/1/0 will be copied from UCFG1.5 to UCFG1.3 when power-on reset. [3] CLKCON register reset value comes from UCFG1. The reset value of CLKCON.2 to CLKCON.0 come from UCFG1.2 to UCFG1.0 and reset value of CLKDBL bit comes from UCFG1.7. Table 5. Extended special function registers[1] Name Description SFR addr. Bit functions and addresses Reset value MSB LSB Hex Binary BODCFG BOD configuration register FFC8H - - - - - BOICFG2 BOICFG1 BOICFG0 [2] CLKCON Clock control register FFDEH CLKOK - WDMOD XTALWD CLKDBL FOSC2 FOSC1 FOSC0 [3] 1000 xxxx CMPREF Comparator reference register FFCBH - REFS5 REFS4 REFS3 - REFS2 REFS1 REFS0 00 0000 0000 RTCDAT H Real-time clock data register high FFBFH 00 0000 0000 RTCDATL Real-time clock data register low FFBEH 00 0000 0000 |
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