PCF2123TS datasheet(39/55 Pages) NXP

39 / 55 page

PCF2123_2

Product data sheet

Rev. 02 — 4 December 2009

39 of 55

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

12. Dynamic characteristics

Table 45.

SPI-bus characteristics

VSS =0V; Tamb = −40 °C to +85 °C. All timing values are valid within the operating supply voltage and temperature range and

referenced to VIL and VIH with an input voltage swing of VSS to VDD.

Symbol

Parameter

Conditions

VDD = 1.6 V

VDD = 2.4 V

VDD = 3.3 V

VDD = 5.0 V

Unit

Min

Max

Min

Max

Min

Max

Min

Max

Timing characteristics (see Figure 28)

fclk(SCL)

SCL clock frequency

2.9

4.54

5.71

8.0

MHz

tSCL

SCL time

345

220

175

125

tclk(H)

clock HIGH time

tclk(L)

clock LOW time

200

120

rise time

for SCL signal

100

fall time

for SCL signal

100

tsu(CE)

CE set-up time

th(CE)

CE hold time

trec(CE)

CE recovery time

tw(CE)

CE pulse width

measured after valid

subaddress is

received

0.99

tsu

set-up time

set-up time for SDI

data

-5

-3

-2

-ns

hold time

hold time for SDI data 25

td(R)SDO

SDO read delay time

bus load = 50 pF

190

108

tdis(SDO)

SDO disable time

no load value; bus will

be held up by bus

capacitance; use RC

time constant with

application values

tt(SDI-SDO) transition time from

SDI to SDO

to avoid bus conﬂict

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