| 전자부품 데이터시트 검색엔진 |
|
MPC5125 데이터시트(PDF) 49 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC5125 데이터시트(HTML) 49 Page - Freescale Semiconductor, Inc |
|
49 / 92 page ![]() Electrical and Thermal Characteristics MPC5125 Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor 49 Figure 7. HRESET Behavior Figure 8. SRESET Behavior Table 19. Reset Timing Symbol Description Value (XTALI CLOCK) SpecID tPORHOLD Time PORESET must be held low before a qualified reset occurs. 4 cycles A3.10 tHRVAL Time HRESET is asserted after a qualified reset occurs. 26810 cycles1 A3.11 tSRVAL Time SRESET is asserted after assertion of HRESET. 21 cycles A3.12 tEXEC Time between SRESET assertion and first core instruction fetch. 4 cycles A3.13 tS_POR_CONF Reset configuration setup time before assertion of PORESET. 1 cycle A3.14 XTALI CLOCK PORESET SRESET HRESET RST_CONF[31:0] ADDR[31:0] tSRVAL tEXEC tHRVAL tHRHOLD tHR_SR_Delay no new fetch of the RST_CONF XTALI CLOCK PORESET SRESET HRESET RST_CONF[31:0] ADDR[31:0] tEXEC tSRMIN tSRHOLD no new fetch of the RST_CONF |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |