REV. C

ADT7463

–43–

Table XXI. Register 0x62 – Enhance Acoustics Reg 1 (Power-On Default = 0x00)

Bit

Name

R/W*

Description

<2:0>

ACOU

Read/Write

These bits select the ramp rate applied to the PWM1 output. Instead of PWM1 jump-

ing instantaneously to its newly calculated speed, PWM1 ramps gracefully at the rate

determined by these bits. This feature enhances the acoustics of the fan being driven by

the PWM1 output.

Time Slot Increase

Time for 33% to 100%

000 = 1

35 s

001 = 2

17.6 s

010 = 3

18 s

011 = 5

7 s

100 = 8

4.4 s

101 = 12

3 s

110 = 24

1.6 s

111 = 48

0.8 s

<3>

EN1

Read/Write

When this bit is 1, acoustic enhancement is enabled on PWM1 output.

<4>

SYNC

Read/Write

SYNC = 1 synchronizes fan speed measurements on TACH2, TACH3, and

TACH4 to PWM3. This allows up to three fans to be driven from PWM3 output and

their speeds to be measured.

SYNC = 0, only TACH3 and TACH4 are synchronized to PWM3 output.

<5>

MIN1

Read/Write

When the ADT7463 is in automatic fan control mode, this bit defines whether PWM 1

is off (0% duty cycle) or at PWM 1 Minimum Duty Cycle when the controlling tem-

<6>

MIN2

Read/Write

When the ADT7463 is in automatic fan speed control mode, this bit defines whether

PWM 2 is off (0% duty cycle) or at PWM 2 Minimum Duty Cycle when the controlling

<7>

MIN3

Read/Write

When the ADT7463 is in automatic fan speed control mode, this bit defines whether

PWM 3 is off (0% duty cycle) or at PWM 3 Minimum Duty Cycle when the controlling

*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.

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