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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 487 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 487 Page - Freescale Semiconductor, Inc |
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487 / 1348 page  Chapter 11 Serial Communication Interface (S12SCIV5) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 487 11.3.2.5 SCI Alternative Control Register 2 (SCIACR2) Read: Anytime, if AMAP = 1 Write: Anytime, if AMAP = 1 76543210 R 00000 BERRM1 BERRM0 BKDFE W Reset 00000000 = Unimplemented or Reserved Figure 11-8. SCI Alternative Control Register 2 (SCIACR2) Table 11-7. SCIACR2 Field Descriptions Field Description 2:1 BERRM[1:0] Bit Error Mode — Those two bits determines the functionality of the bit error detect feature. See Table 11-8. 0 BKDFE Break Detect Feature Enable — BKDFE enables the break detect circuitry. 0 Break detect circuit disabled 1 Break detect circuit enabled Table 11-8. Bit Error Mode Coding BERRM1 BERRM0 Function 0 0 Bit error detect circuit is disabled 0 1 Receive input sampling occurs during the 9th time tick of a transmitted bit (refer to Figure 11-19) 1 0 Receive input sampling occurs during the 13th time tick of a transmitted bit (refer to Figure 11-19) 1 1 Reserved |
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