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PC912XDP512F0MPVR 데이터시트(PDF) 514 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 514 Page - Freescale Semiconductor, Inc |
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514 / 1348 page ![]() Chapter 11 Serial Communication Interface (S12SCIV5) MC9S12XDP512 Data Sheet, Rev. 2.21 514 Freescale Semiconductor 11.5.3.1.6 RXEDGIF Description The RXEDGIF interrupt is set when an active edge (falling if RXPOL = 0, rising if RXPOL = 1) on the RXD pin is detected. Clear RXEDGIF by writing a “1” to the SCIASR1 SCI alternative status register 1. 11.5.3.1.7 BERRIF Description The BERRIF interrupt is set when a mismatch between the transmitted and the received data in a single wire application like LIN was detected. Clear BERRIF by writing a “1” to the SCIASR1 SCI alternative status register 1. This flag is also cleared if the bit error detect feature is disabled. 11.5.3.1.8 BKDIF Description The BKDIF interrupt is set when a break signal was received. Clear BKDIF by writing a “1” to the SCIASR1 SCI alternative status register 1. This flag is also cleared if break detect feature is disabled. 11.5.4 Recovery from Wait Mode The SCI interrupt request can be used to bring the CPU out of wait mode. 11.5.5 Recovery from Stop Mode An active edge on the receive input can be used to bring the CPU out of stop mode. |
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