PC912XDP512F0MPVR datasheet(602/1348 Pages) FREESCALE

부품명	PC912XDP512F0MPVR

상세설명	HCS12X Microcontrollers

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Chapter 16 Interrupt (S12XINTV1)

MC9S12XDP512 Data Sheet, Rev. 2.21

602

Freescale Semiconductor

16.3.1.2

XGATE Interrupt Priority Conﬁguration Register (INT_XGPRIO)

Read: Anytime

Write: Anytime

Address: 0x0126

76543210

00000

XILVL[2:0]

Reset

00000001

= Unimplemented or Reserved

Figure 16-4. XGATE Interrupt Priority Conﬁguration Register (INT_XGPRIO)

Table 16-3. INT_XGPRIO Field Descriptions

Field

Description

2–0

XILVL[2:0]

XGATE Interrupt Priority Level — The XILVL[2:0] bits configure the shared interrupt level of the DMA interrupts

coming from the XGATE module. Out of reset the priority is set to the lowest active level (“1”).

Table 16-4. XGATE Interrupt Priority Levels

Priority

XILVL2

XILVL1

XILVL0

Meaning

Interrupt request is disabled

low

Priority level 1

Priority level 2

Priority level 3

Priority level 4

Priority level 5

Priority level 6

high

Priority level 7

PC912XDP512F0MPVR 데이터시트(PDF) 602 Page - Freescale Semiconductor, Inc