PC912XDP512F0MPVR datasheet(606/1348 Pages) FREESCALE

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Chapter 16 Interrupt (S12XINTV1)

MC9S12XDP512 Data Sheet, Rev. 2.21

606

Freescale Semiconductor

Table 16-6. INT_CFDATA0–7 Field Descriptions

Field

Description

RQST

XGATE Request Enable — This bit determines if the associated interrupt request is handled by the CPU or by

the XGATE module.

0 Interrupt request is handled by the CPU

1 Interrupt request is handled by the XGATE module

Note: The IRQ interrupt cannot be handled by the XGATE module. For this reason, the conﬁguration register

for vector (vector base + 0x00F2) = IRQ vector address) does not contain a RQST bit. Writing a 1 to the

location of the RQST bit in this register will be ignored and a read access will return 0.

2–0

PRIOLVL[2:0]

Interrupt Request Priority Level Bits — The PRIOLVL[2:0] bits conﬁgure the interrupt request priority level of

the associated interrupt request. Out of reset all interrupt requests are enabled at the lowest active level (“1”)

to provide backwards compatibility with previous HCS12 interrupt controllers. Please also refer to Table 16-7 for

available interrupt request priority levels.

Note: Write accesses to conﬁguration data registers of unused interrupt channels will be ignored and read

accesses will return all 0. For information about what interrupt channels are used in a speciﬁc MCU,

please refer to the Device User Guide of that MCU.

Note: When vectors (vector base + 0x00F0–0x00FE) are selected by writing 0xF0 to INT_CFADDR, writes to

INT_CFDATA2–7 (0x00F4–0x00FE) will be ignored and read accesses will return all 0s. The

corresponding vectors do not have conﬁguration data registers associated with them.

Note: Write accesses to the conﬁguration register for the spurious interrupt vector request

(vector base + 0x0010) will be ignored and read accesses will return 0x07 (request is handled by the

CPU, PRIOLVL = 7).

Table 16-7. Interrupt Priority Levels

Priority

PRIOLVL2

PRIOLVL1

PRIOLVL0

Meaning

Interrupt request is disabled

low

Priority level 1

Priority level 2

Priority level 3

Priority level 4

Priority level 5

Priority level 6

high

Priority level 7

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