PC912XDP512F0MPVR datasheet(604/1348 Pages) FREESCALE

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Chapter 16 Interrupt (S12XINTV1)

MC9S12XDP512 Data Sheet, Rev. 2.21

604

Freescale Semiconductor

16.3.1.4

Interrupt Request Conﬁguration Data Registers (INT_CFDATA0–7)

The eight register window visible at addresses INT_CFDATA0–7 contains the conﬁguration data for the

block of eight interrupt requests (out of 128) selected by the interrupt conﬁguration address register

(INT_CFADDR) in ascending order. INT_CFDATA0 represents the interrupt conﬁguration data register

of the vector with the lowest address in this block, while INT_CFDATA7 represents the interrupt

conﬁguration data register of the vector with the highest address, respectively.

Address: 0x0128

76543210

RQST

0000

PRIOLVL[2:0]

Reset

0000000

1 Please refer to the notes following the PRIOLVL[2:0] description below.

= Unimplemented or Reserved

Figure 16-6. Interrupt Request Conﬁguration Data Register 0 (INT_CFDATA0)

Address: 0x0129

76543210

RQST

0000

PRIOLVL[2:0]

Reset

0000000

1 Please refer to the notes following the PRIOLVL[2:0] description below.

= Unimplemented or Reserved

Figure 16-7. Interrupt Request Conﬁguration Data Register 1 (INT_CFDATA1)

Address: 0x012A

76543210

RQST

0000

PRIOLVL[2:0]

Reset

0000000

1 Please refer to the notes following the PRIOLVL[2:0] description below.

= Unimplemented or Reserved

Figure 16-8. Interrupt Request Conﬁguration Data Register 2 (INT_CFDATA2)

Address: 0x012B

76543210

RQST

0000

PRIOLVL[2:0]

Reset

0000000

1 Please refer to the notes following the PRIOLVL[2:0] description below.

= Unimplemented or Reserved

Figure 16-9. Interrupt Request Conﬁguration Data Register 3 (INT_CFDATA3)

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