PC912XDP512F0MPVR datasheet(701/1348 Pages) FREESCALE

701 / 1348 page

Chapter 19 S12X Debug (S12XDBGV2) Module

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

703

19.3.1.5

Debug Trace Buffer Register (DBGTBH:DBGTBL)

Read: Anytime when unlocked and not secured and not armed.

Write: Aligned word writes when disarmed unlock the trace buffer for reading but do not affect trace buffer

contents

Table 19-14. CDCM Encoding

CDCM

Description

Match2 mapped to comparator C match....... Match3 mapped to comparator D match.

Match2 mapped to comparator C/D inside range....... Match3 disabled.

Match2 mapped to comparator C/D outside range....... Match3 disabled.

Reserved

Table 19-15. ABCM Encoding

ABCM

Description

Match0 mapped to comparator A match....... Match1 mapped to comparator B match.

Match 0 mapped to comparator A/B inside range....... Match1 disabled.

Match 0 mapped to comparator A/B outside range....... Match1 disabled.

Reserved

0x0024

Bit 15

Bit 8

Reset

XXXXXXXX

Figure 19-7. Debug Trace Buffer Register (DBGTBH)

0x0025

76543210

Bit 7

Bit 0

Reset

XXXXXXXX

Figure 19-8. Debug Trace Buffer Register (DBGTBL)

Table 19-16. DBGTB Field Descriptions

Field

Description

15–0

Bit[15:0]

Trace Buffer Data Bits — The trace buffer register is a window through which the 64-bit wide data lines of the

trace buffer may be read 16 bits at a time. Each valid read of DBGTB increments an internal trace buffer pointer

which points to the next address to be read. When the ARM bit is written to 1 the trace buffer is locked to prevent

reading. The trace buffer can only be unlocked for reading by writing to DBGTB with an aligned word write when

the module is disarmed. The DBGTB register can be read only as an aligned word, any byte reads or misaligned

access of these registers will return 0 and will not cause the trace buffer pointer to increment to the next trace

buffer address. The same is true for word reads while the debugger is armed. System resets do not affect the

trace buffer contents. The POR state is undeﬁned.

PC912XDP512F0MPVR 데이터시트(PDF) 701 Page - Freescale Semiconductor, Inc

PC912XDP512F0MPVR 데이터시트(HTML) 701 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL