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PC912XDP512F0MPVR 데이터시트(PDF) 771 Page - Freescale Semiconductor, Inc

부품명 PC912XDP512F0MPVR
상세설명  HCS12X Microcontrollers
PDF  1348 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

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Chapter 20 S12X Debug (S12XDBGV3) Module
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
773
execution stage of the instruction queue a transition to the disarmed state0 occurs, ending the debug session
and generating a breakpoint, if breakpoints are enabled. External tagging is only possible in device
emulation modes.
20.4.3.4
Trigger On XGATE S/W Breakpoint Request
The XGATE S/W breakpoint request issues a forced breakpoint request to the S12XCPU immediately
independent of S12XDBG settings and triggers the state sequencer into the disarmed state. Active tracing
sessions are terminated immediately, thus if tracing has not yet begun, no trace information is stored.
XGATE generated breakpoints are independent of the DBGBRK bits. The XGSBPE bit in DBGC1
determines if the XGATE S/W breakpoint function is enabled. The BDM bit in DBGC1 determines if the
XGATE requested breakpoint causes the system to enter BDM Mode or initiate a software interrupt (SWI).
20.4.3.5
Immediate Trigger
Independent of comparator matches or external tag signals it is possible to initiate a tracing session and/or
breakpoint by writing to the TRIG bit in DBGC1. This triggers the state sequencer into the Final State and
issues a forced breakpoint request to both S12XCPU and XGATE.
20.4.3.6
Trigger Priorities
In case of simultaneous triggers, the priority is resolved according to Table 20-38. The lower priority
trigger is suppressed. It is thus possible to miss a lower priority trigger if it occurs simultaneously with a
trigger of a higher priority. The trigger priorities described in Table 20-38 dictate that in the case of
simultaneous matches, the match on the lower channel number (0,1,2,3) has priority. The SC[3:0]
encoding ensures that a match leading to final state has priority over all other matches independent of
current state sequencer state. When configured for range modes a simultaneous match of comparators A
and C generates an active match0 whilst match2 is suppressed.
Table 20-38. Trigger Priorities
Priority
Source
Action
Highest
XGATE
Immediate forced breakpoint......(Tracing terminated immediately).
TRIG
Enter Final State
External TAGHI/TAGLO
Enter State0
Match0 (force or tag hit)
Trigger to next state as defined by state control registers
Match1 (force or tag hit)
Trigger to next state as defined by state control registers
Match2 (force or tag hit)
Trigger to next state as defined by state control registers
Lowest
Match3 (force or tag hit)
Trigger to next state as defined by state control registers



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