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PC912XDP512F0MPVR 데이터시트(PDF) 952 Page - Freescale Semiconductor, Inc

부품명 PC912XDP512F0MPVR
상세설명  HCS12X Microcontrollers
PDF  1348 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PC912XDP512F0MPVR 데이터시트(HTML) 952 Page - Freescale Semiconductor, Inc

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Chapter 23 DQ256 Port Integration Module (S12XDQ256PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
954
Freescale Semiconductor
23.0.5.57 Port J Reduced Drive Register (RDRJ)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port J output pin as either full or reduced. If the port is
used as input this bit is ignored.
23.0.5.58 Port J Pull Device Enable Register (PERJ)
Read: Anytime.
Write: Anytime.
Table 23-52. DDRJ Field Descriptions
Field
Description
7–0
DDRJ[7:4]
DDRJ[2:0]
Data Direction Port J
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is read
on PTJ or PTIJ registers, when changing the DDRJ register.
76543210
R
RDRJ7
RDRJ6
RDRJ5
RDRJ4
0
RDRJ2
RDRJ1
RDRJ0
W
Reset
00000000
= Unimplemented or Reserved
Figure 23-59. Port J Reduced Drive Register (RDRJ)
Table 23-53. RDRJ Field Descriptions
Field
Description
7–0
RDRJ[7:4]
RDRJ[2:0]
Reduced Drive Port J
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
76543210
R
PERJ7
PERJ6
PERJ5
PERJ4
0
PERJ2
PERJ1
PERJ0
W
Reset
11110111
= Unimplemented or Reserved
Figure 23-60. Port J Pull Device Enable Register (PERJ)



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