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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 953 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 953 Page - Freescale Semiconductor, Inc |
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953 / 1348 page  This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or as wired-OR output. This bit has no effect if the port is used as push-pull output. Out of reset a pull-up device is enabled. 23.0.5.59 Port J Polarity Select Register (PPSJ) Read: Anytime. Write: Anytime. This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting a pull-up or pull-down device if enabled. 23.0.5.60 Port J Interrupt Enable Register (PIEJ) Table 23-54. PERJ Field Descriptions Field Description 7–0 PERJ[7:4] PERJ[2:0] Pull Device Enable Port J 0 Pull-up or pull-down device is disabled. 1 Either a pull-up or pull-down device is enabled. 76543210 R PPSJ7 PPSJ6 PPSJ5 PPSJ4 0 PPSJ2 PPSJ1 PPSJ0 W Reset 00000000 = Unimplemented or Reserved Figure 23-61. Port J Polarity Select Register (PPSJ) Table 23-55. PPSJ Field Descriptions Field Description 7–0 PPSJ[7:4] PPSJ[2:0] Polarity Select Port J 0 Falling edge on the associated port J pin sets the associated flag bit in the PIFJ register. A pull-up device is connected to the associated port J pin, if enabled by the associated bit in register PERJ and if the port is used as general purpose input or as IIC port. 1 Rising edge on the associated port J pin sets the associated flag bit in the PIFJ register. A pull-down device is connected to the associated port J pin, if enabled by the associated bit in register PERJ and if the port is used as input. 76543210 R PIEJ7 PIEJ6 PIEJ5 PIEJ4 0 PIEJ2 PIEJ1 PIEJ0 W Reset 00000000 = Unimplemented or Reserved Figure 23-62. Port J Interrupt Enable Register (PIEJ) |
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