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PC912XDP512F0MPVR 데이터시트(PDF) 1239 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 1239 Page - Freescale Semiconductor, Inc |
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1239 / 1348 page ![]() Appendix A Electrical Characteristics MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 1241 A.1.5 Absolute Maximum Ratings Absolute maximum ratings are stress ratings only. A functional operation under or outside those maxima is not guaranteed. Stress beyond those limits may affect the reliability or cause permanent damage of the device. This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (e.g., either VSS35 or VDD35). A.1.6 ESD Protection and Latch-up Immunity All ESD testing is in conformity with CDF-AEC-Q100 stress test qualification for automotive grade integrated circuits. During the device qualification ESD stresses were performed for the Human Body Model (HBM) and the Charge Device Model. A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete DC parametric and functional testing is performed per the applicable device Table A-1. Absolute Maximum Ratings1 1 Beyond absolute maximum ratings device might be damaged. Num Rating Symbol Min Max Unit 1 I/O, regulator and analog supply voltage VDD35 –0.3 6.0 V 2 Digital logic supply voltage2 2 The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The absolute maximum ratings apply when the device is powered from an external source. VDD –0.3 3.0 V 3 PLL supply voltage2 VDDPLL –0.3 3.0 V 4 Voltage difference VDDX to VDDR and VDDA ∆VDDX –0.3 0.3 V 5 Voltage difference VSSX to VSSR and VSSA ∆VSSX –0.3 0.3 V 6 Digital I/O input voltage VIN –0.3 6.0 V 7 Analog reference VRH, VRL –0.3 6.0 V 8 XFC, EXTAL, XTAL inputs VILV –0.3 3.0 V 9 TEST input VTEST –0.3 10.0 V 10 Instantaneous maximum current Single pin limit for all digital I/O pins3 3 All digital I/O pins are internally clamped to V SSX and VDDX, VSSR and VDDR or VSSA and VDDA. I D –25 +25 mA 11 Instantaneous maximum current Single pin limit for XFC, EXTAL, XTAL4 4 Those pins are internally clamped to V SSPLL and VDDPLL. I DL –25 +25 mA 12 Instantaneous maximum current Single pin limit for TEST 5 5 This pin is clamped low to V SSPLL, but not clamped high. This pin must be tied low in applications. I DT –0.25 0 mA 13 Storage temperature range Tstg –65 155 °C |
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