| 전자부품 데이터시트 검색엔진 |
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AT90PWM3 데이터시트(PDF) 156 Page - ATMEL Corporation |
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AT90PWM3 데이터시트(HTML) 156 Page - ATMEL Corporation |
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156 / 361 page ![]() 156 4317J–AVR–08/10 AT90PWM2/3/2B/3B 16.18.1 Available Input Mode according to Running Mode Some Input Modes are not consistent with some Running Modes. So the table below gives the input modes which are valid according to running modes.. 16.18.2 Event Capture The PSC can capture the value of time (PSC counter) when a retrigger event or fault event occurs on PSC inputs. This value can be read by sofware in PICRnH/L register. 16.18.3 Using the Input Capture Unit The main challenge when using the Input Capture unit is to assign enough processor capacity for handling the incoming events. The time between two events is critical. If the processor has not read the captured value in the PICRn Register before the next event occurs, the PICRn will be overwritten with a new value. In this case the result of the capture will be incorrect. When using the Input Capture interrupt, the PICRn Register should be read as early in the inter- rupt handler routine as possible. Even though the Input Capture interrupt has relatively high priority, the maximum interrupt response time is dependent on the maximum number of clock cycles it takes to handle any of the other interrupt requests. Table 16-7. Available Input Modes according to Running Modes Input Mode Number : 1 Ramp Mode 2 Ramp Mode 4 Ramp Mode Centered Mode 1 Valid Valid Valid Do not use 2 Do not use Valid Valid Do not use 3 Do not use Valid Valid Do not use 4 Valid Valid Valid Valid 5 Do not use Valid Valid Do not use 6 Do not use Valid Valid Do not use 7 Valid Valid Valid Valid 8 Valid Valid Valid Do not use 9 Valid Valid Valid Do not use 10 Do not use 11 12 13 14 Valid Valid Valid Do not use 15 Do not use |
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