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EPCS4 데이터시트(PDF) 29 Page - Altera Corporation |
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EPCS4 데이터시트(HTML) 29 Page - Altera Corporation |
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29 / 38 page ![]() Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet 3–29 Timing Information © December 2009 Altera Corporation Configuration Handbook (Complete Two-Volume Set) Figure 3–20 shows the timing waveform for FPGA AS configuration scheme using a serial configuration device. f For more information about the timing parameters in Figure 3–20, refer to the respective FPGA family handbook Configuration chapter. Figure 3–20. AS Configuration Timing Note to Figure 3–20: (1) tCD2UM is a FPGA dependent parameter. For more information, refer to the respective device configuration chapters. Read Address bit N-1 bit N bit 1 bit 0 t (1) nSTATUS nCONFIG CONF_DONE nCSO DCLK ASDO DATA0 INIT_DONE User I/O User Mode Tri-stated with internal pull-up resistor CD2UM tCF2ST1 |
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