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EPCS4 데이터시트(PDF) 33 Page - Altera Corporation |
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EPCS4 데이터시트(HTML) 33 Page - Altera Corporation |
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33 / 38 page ![]() Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet 3–33 Pin Information © December 2009 Altera Corporation Configuration Handbook (Complete Two-Volume Set) Pin Information As shown in Figure 3–21 and Figure 3–22, the serial configuration device is an 8-pin or 16-pin device. The control pins on the serial configuration device are: serial data output (DATA), active serial data input (ASDI), serial clock (DCLK), and chip select (nCS). Table 3–23 lists the serial configuration device's pin descriptions. Figure 3–21 shows the Altera serial configuration device 8-pin SOIC package and its pin-out diagram. Figure 3–22 shows the Altera serial configuration device 16-pin SOIC package and its pin-out diagram. Figure 3–21. Altera Serial Configuration Device 8-Pin SOIC Package Pin-Out Diagram Figure 3–22. Altera Serial Configuration Device 16-Pin SOIC Package Pin-Out Diagram Note to Figure 3–22: (1) These pins can be left floating or connected to VCC or GND, whichever is more convenient on the board. VCC VCC DCLK ASDI VCC GND nCS DATA EPCS1, EPCS4, or EPCS16 1 2 3 4 8 7 6 5 DCLK ASDI N.C. N.C. N.C. N.C. VCC VCC N.C. N.C. GND VCC nCS DATA N.C. N.C. EPCS16, EPCS64, or EPCS128 1 2 3(1) 4(1) 16 15 14(1) 13(1) 5(1) 6(1) 7 8 12(1) 11(1) 10 9 Table 3–23. Serial Configuration Device Pin Description (Part 1 of 2) Pin Name Pin Number in 8-Pin SOIC Package Pin Number in 16-Pin SOIC Package Pin Type Description DATA 2 8 Output The DATA output signal transfers data serially out of the serial configuration device to the FPGA during read/configuration operation. During read/configuration operations, the serial configuration device is enabled by pulling nCS low. The DATA signal transitions on the falling edge of DCLK. ASDI 5 15 Input The AS data input signal is used to transfer data serially into the serial configuration device. It receives the data that should be programmed into the serial configuration device. Data is latched on the rising edge of DCLK. |
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