P89LPC9211FDH datasheet(36/75 Pages) NXP

36 / 75 page

P89LPC92X1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 1 December 2010

36 of 75

NXP Semiconductors

P89LPC9201/9211/922A1/9241/

8-bit microcontroller with 8-bit ADC

7.19.1 Reset vector

Following reset, the P89LPC9201/9211/922A1/9241/9251 will fetch instructions from

either address 0000H or the Boot address. The Boot address is formed by using the boot

vector as the high byte of the address and the low byte of the address = 00H.

The boot address will be used if a UART break reset occurs, or the non-volatile boot

status bit (BOOTSTAT.0) = 1, or the device is forced into ISP mode during power-on (see

P89LPC9201/9211/922A1/9241/9251 User manual). Otherwise, instructions will be

fetched from address 0000H.

7.20 Timers/counters 0 and 1

The P89LPC9201/9211/922A1/9241/9251 has two general purpose counter/timers which

are upward compatible with the standard 80C51 Timer 0 and Timer 1. Both can be

configured to operate either as timers or event counters. An option to automatically toggle

the T0 and/or T1 pins upon timer overflow has been added.

In the ‘Timer’ function, the register is incremented every machine cycle.

In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its

corresponding external input pin, T0 or T1. In this function, the external input is sampled

once during every machine cycle.

Timer 0 and Timer 1 have five operating modes (Modes 0, 1, 2, 3 and 6). Modes 0, 1, 2

and 6 are the same for both Timers/Counters. Mode 3 is different.

7.20.1 Mode 0

Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit

Counter with a divide-by-32 prescaler. In this mode, the Timer register is configured as a

13-bit register. Mode 0 operation is the same for Timer 0 and Timer 1.

7.20.2 Mode 1

Mode 1 is the same as Mode 0, except that all 16 bits of the timer register are used.

7.20.3 Mode 2

Mode 2 configures the Timer register as an 8-bit Counter with automatic reload. Mode 2

operation is the same for Timer 0 and Timer 1.

7.20.4 Mode 3

When Timer 1 is in Mode 3 it is stopped. Timer 0 in Mode 3 forms two separate 8-bit

counters and is provided for applications that require an extra 8-bit timer. When Timer 1 is

in Mode 3 it can still be used by the serial port as a baud rate generator.

7.20.5 Mode 6

In this mode, the corresponding timer can be changed to a PWM with a full period of

256 timer clocks.

P89LPC9211FDH 데이터시트(PDF) 36 Page - NXP Semiconductors

P89LPC9211FDH 데이터시트(HTML) 36 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

데이터시트 다운로드

링크 URL