MPC8315ECVRAGDA datasheet(37/112 Pages) FREESCALE

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MPC8315E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0

Freescale Semiconductor

Ethernet: Three-Speed Ethernet, MII Management

9.5.4

SGMII AC Timing Specifications

This section describes the SGMII transmit and receive AC timing specifications. Transmitter and receiver

characteristics are measured at the transmitter outputs (TX[n] and TX[n]) or at the receiver inputs (RX[n]

and RX[n]) as depicted in Figure 21 respectively.

9.5.4.1

SGMII Transmit AC Timing Specifications

Table 37 provides the SGMII transmit AC timing targets. A source synchronous clock is not provided.

Loss of signal threshold

EQ = 0

VLOS

—

100

3, 4

EQ = 1

—

175

Input AC common mode voltage

VCM_ACp-p

—

100

Receiver differential input impedance

ZRX_DIFF

100

120

—

Receiver common mode input

impedance

ZRX_CM

—

Common mode input voltage

VCM

—Vxcorevss

—V

Note:

1. Input must be externally AC-coupled.

2. VRX_DIFFp-p is also referred to as peak to peak input differential voltage

3. The concept of this parameter is equivalent to the Electrical Idle Detect Threshold parameter in PCI Express. Refer to PCI

Express Differential Receiver (RX) Input Specifications section for further explanation.

4. The EQ shown in the table refers to the RXEQA or RXEQE bit field of MPC8315E’s SerDes Control Register 0.

5. VCM_ACp-p is also referred to as peak to peak AC common mode voltage.

6. On-chip termination to XCOREVSS.

Table 37. SGMII Transmit AC Timing Specifications

At recommended operating conditions with XCOREVDD = 1.0V ± 5%.

Parameter

Symbol

Min

Typ

Max

Unit

Notes

Deterministic Jitter

—

0.17

UI p-p

—

Total Jitter

—

0.35

UI p-p

—

Unit Interval

799.92

800

800.08

—

VOD fall time (80%-20%)

tfall

—

120

—

VOD rise time (20%-80%)

trise

—

120

—

Notes:

1. Each UI is 800 ps ± 100 ppm.

Table 36. SGMII DC Receiver Electrical Characteristics (continued)

Parameter

Symbol

Min

Typ

Max

Unit

Notes

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