MPC8315ECVRAGDA datasheet(63/112 Pages) FREESCALE

63 / 112 page

MPC8315E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0

Freescale Semiconductor

PCI Express

16.2

AC Requirements for PCI Express SerDes Clocks

Table 53 lists the PCI Express SerDes clock AC requirements.

16.3

Clocking Dependencies

The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm)

of each other at all times. This is specified to allow bit rate clock sources with a ±300 ppm tolerance.

16.4

Physical Layer Specifications

Following is a summary of the specifications for the physical layer of PCI Express on this device. For

further details as well as the specifications of the transport and data link layer please use the PCI Express

Base Specification, Rev. 1.0a.

16.4.1

Differential Transmitter (TX) Output

Table 54 defines the specifications for the differential output at all transmitters (TXs). The parameters are

specified at the component pins.

Table 53. SD_REF_CLK and SD_REF_CLK AC Requirements

Symbol

Parameter Description

Min

Typ

Max

Units

Notes

tREF

REFCLK cycle time

—

tREFCJ

REFCLK cycle-to-cycle jitter. Difference in the period of any two

adjacent REFCLK cycles.

——

100

—

tREFPJ

Phase jitter. Deviation in edge location with respect to mean edge

location.

–50

—

Table 54. Differential Transmitter (TX) Output Specifications

Parameter

Symbol

Comments

Min

Typical

Max

Units

Notes

Unit interval

Each UI is 400 ps ± 300 ppm.

UI does not account for

Spread Spectrum Clock

dictated variations.

399.88

400

400.12

Differential peak-to-peak

output voltage

VTX-DIFFp-p

VTX-DIFFp-p = 2*|VTX-D+ -

VTX-D-|

0.8

—

1.2

De-Emphasized

differential output voltage

(ratio)

VTX-DE-RATIO

Ratio of the VTX-DIFFp-p of the

second and following bits after

a transition divided by the

VTX-DIFFp-p of the first bit after

a transition.

–3.0

–3.5

-4.0

Minimum TX eye width

TTX-EYE

The maximum Transmitter

jitter can be derived as

TTX-MAX-JITTER = 1 - UTX-EYE=

0.3 UI.

0.70

——UI

2, 3

MPC8315ECVRAGDA 데이터시트(PDF) 63 Page - Freescale Semiconductor, Inc

MPC8315ECVRAGDA 데이터시트(HTML) 63 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL