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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SC28L201 데이터시트(PDF) 64 Page - NXP Semiconductors |
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SC28L201 데이터시트(HTML) 64 Page - NXP Semiconductors |
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64 / 110 page  9397 750 13138 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 — 31 October 2005 64 of 110 Philips Semiconductors SC28L201 3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO 8.4 Programmable counters, timers, and baud rate generators 8.4.1 Programmable BRG Timer Reload Registers, Upper 0 and Upper 1 (PBRGPU) This is the upper byte of the 16-bit value used by the BRG timer in generating a baud rate clock. 8.4.2 Programmable BRG Timer Reload Registers, Lower 0 and Lower 1 (PBRGPL) This is the lower byte of the 16-bit value used by the BRG timer in generating a baud rate clock. Table 38: PBRGPU - Programmable BRG Timer Reload Registers, Upper 0 and Upper 1 (address 0x27) bit description Bit Symbol Description 7:0 8 MSBs of the BRG Timer divisor. Table 39: PBRGPL - Programmable BRG Timer Reload Registers, Lower 0 and Lower 1 (address 0x26) bit description Bit Symbol Description 7:0 8 LSBs of the BRG Timer divisor. |
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