SC28L201 datasheet(76/110 Pages) NXP

76 / 110 page

9397 750 13138

Product data sheet

Rev. 01 — 31 October 2005

76 of 110

Philips Semiconductors

SC28L201

3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO

8.6.3 Input Port Change Register Upper Nibble, A (IPCRU)

This register may be read to determine the current logical level of the I/O pins and

examine the output of the change detectors assigned to each pin. If the change detection

is not enabled or if the pin is conﬁgured as an output, the associated change ﬁeld will read

‘0’.

Table 63:

IPCRU - Input Port Change Register Upper Nibble, A (address 0x13)

bit description

Bit

Symbol

Description

∆I/O7A change.

0 = no change

1 = change

∆I/O6A change.

0 = no change

1 = change

∆I/O5A change.

0 = no change

1 = change

∆I/O4A change.

0 = no change

1 = change

I/O7A state. Reads the actual logic level at the pin.

1 = HIGH level

0 = LOW level

I/O6A state. Reads the actual logic level at the pin.

1 = HIGH level

0 = LOW level

I/O5A state. Reads the actual logic level at the pin.

1 = HIGH level

0 = LOW level

I/O4A state. Reads the actual logic level at the pin.

1 = HIGH level

0 = LOW level

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