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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MCP4716 데이터시트(PDF) 41 Page - Microchip Technology |
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MCP4716 데이터시트(HTML) 41 Page - Microchip Technology |
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41 / 86 page  © 2011 Microchip Technology Inc. DS22272A-page 41 MCP4706/4716/4726 TABLE 4-3: STATUS BITS OPERATION TABLE 4-4: CONFIGURATION BITS TABLE 4-5: CONFIGURATION BIT VALUES AFTER POR/BOR EVENT REGISTER 4-1: DAC REGISTER BITS Name Function RDY/BSY This bit indicates the state of the EEPROM program memory 1 = EEPROM is not in a programming cycle 0 = EEPROM is in a programming cycle POR Power-On-Reset status indicator (flag) 1 = Device is powered on with VDD > VPOR. Ensure that VDD is above VDD(MIN) to ensure proper operation. 0 = Device is in powered off state. If this value is read, VDD < VDD(MIN) < VPOR. Unreliable device operation should be expected. Name Function VREF1:VREF0 Resistor Ladder Voltage Reference (VRL) selection bits 0x =VDD (Unbuffered) 10 =VREF pin (Unbuffered) 11 =VREF pin (Buffered) PD1:PD0 Power-Down selection bits When the DAC is powered down, most of the internal circuits are powered off and the op amp is disconnected from the VOUT pin. 00 = Not Powered Down (Normal operation) 01 = Powered Down - VOUT is loaded with 1 kΩ resistor to ground. 10 = Powered Down - VOUT is loaded with 100 kΩ resistor to ground. 11 = Powered Down - VOUT is loaded with 500 kΩ resistor to ground. Note: See Table 4-2 and Figure 4-5 for more details. G Gain selection bit 0 = 1x (gain of 1) 1 = 2x (gain of 2). Not applicable when VDD is used as VRL Note: If VREF = VDD, the device uses a gain of 1 only, regardless of the gain selection bit (G) setting. R/W R/W R/W R/W R/W Comment Bit Name VREF1 VREF0 PD1 PD0 G POR Event 0(1) 0(1) 0(1) 0(1) 0(1) When VDD transitions from VDD < VPOR to VDD > VPOR BOR Event 00110 When VDD transitions from VDD > VBOR to VDD < VBOR Note 1: Default configuration when the device is shipped to customer. The POR/BOR value may be modified by writing the corresponding nonvolatile configuration bit. R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Comment Bit Name —(2) —(2) —(2) —(2) D7 D6 D5 D4 D3 D2 D1 D0 MCP4706 —(2) —(2) D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MCP4716 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MCP4726 POR/BOR Event 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) Note 1: Default configuration when the device is shipped to customer. The POR/BOR value may be modified by writing the corresponding nonvolatile configuration bit. 2: This device does not implement this bit, so there is no corresponding POR/BOR value. |
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