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AS5050 데이터시트(PDF) 15 Page - ams AG |
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AS5050 데이터시트(HTML) 15 Page - ams AG |
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15 / 22 page ![]() www.austriamicrosystems.com Revision 1.12 15 - 22 AS5050 Datasheet - Application In form atio n Figure 11. SPI Command / Response Data Flow 8.1.2 SPI Timing Figure 12. SPI Timing Diagram Table 15. SPI Timing Characteristics Parameter Description Min Max Unit tL Time between SS/ falling edge and SCK rising edge 10 1 ns tL Time between SS/ falling edge and SCK rising edge 350 2 ns tSCK Serial clock period 100 ns tSCKL Low period of serial clock 50 ns tSCKH High period of serial clock 50 ns tH Time between last falling edge of SCK and rising edge of SS/ tSCK / 2 ns tXSSH High time of SS/ between two transmissions 10 1 1. No synchronization needed because the internal clock is inactive ns tXSSH High time of SS/ between two transmissions 350 2 2. Synchronization with the internal clock → 2 * tCLK_SYS + 10 ns (e.g. at 8 MHz → 253 ns) ns tMOSI Data input valid to clock edge 20 ns tMISO SCK edge to data output valid 20 ns Command 1 Command 2 Command N - 1 Command N MOSI MSBLSB MSBLSB MSBLSB MSBLSB 0x00 Response 1 Response 2 Response N - 1 MISO MSBLSB MSBLSB MSBLSB MSBLSB TCOM Transmission 1 Transmission 2 Transmission N - 1 Transmission N SS / ( Input ) SCK ( Input ) MOSI ( Input ) MISO ( Output ) tsck tL t MOSI t MISO tOZ tOZ tH t XSSH t sckL t sckH data[ 15] data[ 15] data[ 14] data[ 14] data[0] data[0] |
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