 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
MPC5673K 데이터시트(PDF) 116 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC5673K 데이터시트(HTML) 116 Page - Freescale Semiconductor, Inc |
|
|
116 / 140 page  MPC5675K Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 116 Figure 39. External interrupt timing 3.22.5 FlexCAN timing 3.22.6 DSPI timing Table 66. FlexCAN timing No. Symbol Parameter Conditions Min Max Unit 1fCAN_TX CC FlexCAN design target transmit data rate —10 — MBit/s 2fCAN_RX CC FlexCAN design target receive data rate —10 — MBit/s Table 67. DSPI timing No. Symbol Parameter Conditions Min Max Unit 1tSCK CC DSPI cycle time Master (MTFE = 0) 62 — ns Slave (MTFE = 0) 62 — Slave receive only mode1 16 — 2tCSC CC PCS to SCK delay —16 — ns 3tASC CC After SCK delay —16 — ns 4tSDC CC SCK duty cycle —0.4 × tSCK 0.6 × tSCK ns 5tA CC Slave access time SS active to SOUT valid — 40 ns 6tDIS CC Slave SOUT disable time SS inactive to SOUT High-Z or invalid — 10 ns 7tPCSC CC PCSx to PCSS time —13 — ns 8tPASC CC PCSS to PCSx time —13 — ns CLKOUT IRQ 1 2 3 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
