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PIC24F04KA201 데이터시트(PDF) 24 Page - Microchip Technology |
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PIC24F04KA201 데이터시트(HTML) 24 Page - Microchip Technology |
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24 / 48 page ![]() PIC24FXXKAXXX DS39919A-page 24 Advance Information © 2008 Microchip Technology Inc. 4.2 Confirming the Presence of the Programming Executive Before beginning programming, confirm if the programming executive is stored in the executive memory and perform the following: 1. Enter In-Circuit Serial Programming mode (ICSP). 2. Read the unique Application ID Word stored in the executive memory. Figure 4-2 illustrates this procedure. If the programming executive is resident, the Application ID Word is BBh, which means programming can resume as normal. However, if the Application ID Word is not BBh, the programming executive must be programmed to executive code memory using the method described in Section 5.4 “Programming the Programming Executive to Memory”. Section 3.0 “Device Programming – ICSP” describes the ICSP programming method. Section 3.13 “Reading the Application ID Word” describes the procedure for reading the Application ID Word in ICSP mode. FIGURE 4-2: CONFIRMING PRESENCE OF PROGRAMMING EXECUTIVE 4.3 Entering Enhanced ICSP Mode 4.3.1 LOW-VOLTAGE ENTRY Perform the following steps to enter Enhanced ICSP Program/Verify mode using MCLR: 1. Briefly drive the MCLR pin high, and then low. 2. Clock a 32-bit key sequence into PGDx. 3. Drive the MCLR high within a specified period and continue to hold high. Figure 4-3 illustrates this procedure. The programming voltage applied to MCLR is VIH, which is essentially VDD in the case of PIC24FXXKAXXX devices. There is no minimum time requirement for holding at VIH. After VIH is removed, an interval of at least P18 must elapse before presenting the key sequence on PGDx. The key sequence is a specific 32-bit pattern: ‘0100 1101 0100 0011 0100 1000 0101 0000 ‘ (more easily remembered as 4D434850h in hexadecimal format). The device will enter Program/Verify mode only if the key sequence is valid. The MSB of the most significant nibble must be shifted in first. Once the key sequence is complete, VIH must be applied to MCLR and held at that level for as long as the Program/Verify mode is to be maintained. An interval of at least P19 and P7 must elapse before presenting data on PGDx. Signals appearing on PGDx before P7 has elapsed will not be interpreted as valid. 4.3.2 HIGH-VOLTAGE ENTRY The procedure for entering Enhanced ICSP Program/Verify mode using the VPP pin is the same as entering the mode using MCLR. The only differences are that the programming voltage applied to VPP is VIHH, and before presenting the key sequence on PGDx, an interval of at least P18 should elapse. Figure 4-4 illustrates this procedure. Once the key sequence is complete, an interval of at least P19 should elapse and the VIHH should be reduced to VIH. The voltage, VIH, must be applied to VPP and held at that level for as long as the Program/Verify mode is to be maintained. An interval of at least P19 and P7 should elapse before presenting data on PGDx. Signals appearing on PGDx before P7 has elapsed will not be interpreted as valid. On successful entry, the program memory can be accessed and programmed in serial fashion. While in the Program/Verify mode, all unused I/Os are placed in the high-impedance state. Is Start Enter ICSP™ Mode Application ID BBh? Resident in Memory Yes No Prog. Executive is Application ID Read the be Programmed Prog. Executive must from Address 805BEh Finish |
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