전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

AFS090 데이터시트(PDF) 235 Page - Microsemi Corporation

부품명 AFS090
상세설명  Fusion Family of Mixed Signal FPGAs
PDF  334 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  MICROSEMI [Microsemi Corporation]
홈페이지  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

AFS090 데이터시트(HTML) 235 Page - Microsemi Corporation

Back Button AFS090 Datasheet HTML 231Page - Microsemi Corporation AFS090 Datasheet HTML 232Page - Microsemi Corporation AFS090 Datasheet HTML 233Page - Microsemi Corporation AFS090 Datasheet HTML 234Page - Microsemi Corporation AFS090 Datasheet HTML 235Page - Microsemi Corporation AFS090 Datasheet HTML 236Page - Microsemi Corporation AFS090 Datasheet HTML 237Page - Microsemi Corporation AFS090 Datasheet HTML 238Page - Microsemi Corporation AFS090 Datasheet HTML 239Page - Microsemi Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 235 / 334 page
background image
Fusion Family of Mixed Signal FPGAs
R e visio n 2
2 - 219
Output Register
Timing Characteristics
Figure 2-138 • Output Register Timing Diagram
Preset
Clear
DOUT
CLK
Data_out
Enable
tOSUE
50%
50%
tOSUD tOHD
50%
50%
tOCLKQ
1
0
tOHE
tORECPRE
tOREMPRE
tORECCLR
tOREMCLR
tOWCLR
tOWPRE
tOPRE2Q
tOCLR2Q
tOCKMPWH tOCKMPWL
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
50%
Table 2-177 • Output Data Register Propagation Delays
Commercial Temperature Range Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V
Parameter
Description
–2
–1
Std.
Units
tOCLKQ
Clock-to-Q of the Output Data Register
0.59
0.67
0.79
ns
tOSUD
Data Setup Time for the Output Data Register
0.31
0.36
0.42
ns
tOHD
Data Hold Time for the Output Data Register
0.00
0.00
0.00
ns
tOSUE
Enable Setup Time for the Output Data Register
0.44
0.50
0.59
ns
tOHE
Enable Hold Time for the Output Data Register
0.00
0.00
0.00
ns
tOCLR2Q
Asynchronous Clear-to-Q of the Output Data Register
0.80
0.91
1.07
ns
tOPRE2Q
Asynchronous Preset-to-Q of the Output Data Register
0.80
0.91
1.07
ns
tOREMCLR
Asynchronous Clear Removal Time for the Output Data Register
0.00
0.00
0.00
ns
tORECCLR
Asynchronous Clear Recovery Time for the Output Data Register
0.22
0.25
0.30
ns
tOREMPRE
Asynchronous Preset Removal Time for the Output Data Register
0.00
0.00
0.00
ns
tORECPRE
Asynchronous Preset Recovery Time for the Output Data Register
0.22
0.25
0.30
ns
tOWCLR
Asynchronous Clear Minimum Pulse Width for the Output Data Register
0.22
0.25
0.30
ns
tOWPRE
Asynchronous Preset Minimum Pulse Width for the Output Data
Register
0.22
0.25
0.30
ns
tOCKMPWH Clock Minimum Pulse Width High for the Output Data Register
0.36
0.41
0.48
ns
tOCKMPWL
Clock Minimum Pulse Width Low for the Output Data Register
0.32
0.37
0.43
ns
Note:
For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on
page 3-9.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com