| 전자부품 데이터시트 검색엔진 |
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SC667201MMG3 데이터시트(PDF) 99 Page - Freescale Semiconductor, Inc |
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SC667201MMG3 데이터시트(HTML) 99 Page - Freescale Semiconductor, Inc |
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99 / 120 page ![]() MPC5642A Microcontroller Data Sheet, Rev. 3.1 Freescale Semiconductor 99 Electrical characteristics 3.17.5 External interrupt timing (IRQ pin) Figure 23. External interrupt timing 3.17.6 eTPU timing Table 42. External interrupt timing1 1 IRQ timing specified at V DD = 1.14 V to 1.32 V, VDDEH = 3.0 V to 5.25 V, VDD33 and VDDSYN = 3.0 V to 3.6 V, TA =TL to TH. # Symbol Characteristic Value Unit Min Max 1tIPWL IRQ Pulse Width Low 3 — tCYC 2tIPWH IRQ Pulse Width High 3 — tCYC 3tICYC IRQ Edge to Edge Time2 2 Applies when IRQ pins are configured for rising edge or falling edge events, but not both. 6— tCYC Table 43. eTPU timing1 1 eTPU timing specified at V DD = 1.14 V to 1.32 V, VDDEH = 3.0 V to 5.25 V, VDD33 and VDDSYN = 3.0 V to 3.6 V, TA =TL to TH, and CL = 50 pF with SRC = 0b00. # Symbol Characteristic Value Unit Min Max 1tICPW eTPU Input Channel Pulse Width 4 — tCYC 2tOCPW eTPU Output Channel Pulse Width2 2 This specification does not include the rise and fall times. When calculating the minimum eTPU pulse width, include the rise and fall times defined in the slew rate control fields (SRC) of the pad configuration registers (PCR). 2— tCYC IRQ 1 2 3 |
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