| 전자부품 데이터시트 검색엔진 |
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TLE4269GL 데이터시트(PDF) 4 Page - Siemens Semiconductor Group |
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TLE4269GL 데이터시트(HTML) 4 Page - Siemens Semiconductor Group |
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4 / 19 page ![]() TLE 4269 Semiconductor Group 4 1998-11-01 Pin Configuration (top view) Pin Definitions and Functions (TLE 4269 GL) Pin No. Symbol Function 1RE Reset Threshold; if not needed connect to GND. 2D Reset Delay; to select delay time connect to GND via external capacitor. 4-7, 14-17 GND Ground 10 R Reset Output; the open-collector output is internally linked to Q via 20 k Ω pull-up resistor. 11 SO Sense Output; the open-collector output is internally linked to Q via 20 k Ω pull-up resistor. 12 Q Output; connect to GND with a 10 µF capacitor, ESR < 10 Ω. 19 I Input; block directly to GND at the IC by a ceramic capacitor. 20 SI Sense Input; if not needed connect to Q. P-DSO-20-6 N.C. 12 11 N.C. N.C. GND 1 2 3 4 20 5 19 6 18 7 N.C. 17 8 Q 16 9 15 10 14 13 RE D GND Ι AEP01802 N.C. GND GND R S GND SO GND GND GND Ι |
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