| 전자부품 데이터시트 검색엔진 |
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TLE4269GL 데이터시트(PDF) 3 Page - Siemens Semiconductor Group |
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TLE4269GL 데이터시트(HTML) 3 Page - Siemens Semiconductor Group |
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3 / 19 page ![]() TLE 4269 Semiconductor Group 3 1998-11-01 Pin Configuration (top view) Pin Definitions and Functions (TLE 4269 GM) Pin No. Symbol Function 1RE Reset Threshold; if not needed connect to GND. 2D Reset Delay; connect to GND via external delay capacitor for setting delay time. 3, 4, 5, 6 GND Ground 7R Reset Output; open-collector output, internally connected to Q via a pull-up resistor of 20 k Ω. 8SO Sense Output; open-collector output, internally connected to Q via a 20 k Ω pull-up resistor. 9Q 5-V Output; connect to GND with a 10 µF capacitor, ESR < 10 Ω. 10, 11, 12 GND Ground 13 I Input; block to GND directly at the IC by a ceramic capacitor. 14 SI Sense Input; if not needed connect to Q. P-DSO-14-4 AEP02248 Q GND SI GND R GND Ι 10 9 GND GND 1 2 3 4 5 GND 6 7SO 14 13 12 11 D GND 8 RE |
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