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MC34708 데이터시트(PDF) 86 Page - Freescale Semiconductor, Inc |
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MC34708 데이터시트(HTML) 86 Page - Freescale Semiconductor, Inc |
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86 / 159 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 86 MC34708 Functional Block Description 7.8.2 PWM Outputs There are two PWM outputs on the MC34708 PWM1 and PWM2 and which are controlled by the PWMxDUTY and PWMxCLKDIV registers shown in Table 79.The base clock will be the 2.0 MHz divided by 32. 32.768 kHz Crystal Oscillator RTC Block Description and Application Information PUS[1:0] Pull-up/Pull-down enable 00: 10 K active pull-down 01: 10 K active pull-up 10: 100 K active pull-down 11: 100 K active pull-up (default) SRE[1:0] Slew rate enable 00: slow (default) 01: normal 10: fast 11: very fast x= 0, 1, 2, or 3 Table 79. PWMx Duty Cycle Programming PWMxDC[5:0]((63)) Duty Cycle 000000 0/32, Off (default) 000001 1/32 … … 010000 16/32 … … 011111 31/32 1xxxxx 32/32, Continuously On Notes 63. “x” represent 1 and 2 Table 80. PWMx Clock Divider Programming PWMxCLKDIV[5:0]((64)) Duty Cycle 000000 Base Clock 000001 Base Clock / 2 … … 001111 Base Clock / 16 … … 111111 Base Clock / 64 Notes 64. “x” represent 1 and 2 Table 78. GPIOLVx Control SPI Bit Description |
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