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DAC1282IPW 데이터시트(PDF) 33 Page - Texas Instruments

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부품명 DAC1282IPW
상세설명  LOW DISTORTION DIGITAL-TO-ANALOG CONVERTER FOR SEISMIC
PDF  43 Pages
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DAC1282IPW 데이터시트(HTML) 33 Page - Texas Instruments

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DAC1282
www.ti.com
SBAS490
– DECEMBER 2011
SINEG: Sine Mode Digital Gain Register (Address = 01h)
7
6
5
4
3
2
1
0
SINEG7
SINEG6
SINEG5
SINEG4
SINEG3
SINEG2
SINEG1
SINEG0
Bits[7:0]
SINEG[7:0]: Sine mode digital gain
This register byte sets the sine mode digital gain from 0 dB to
–119.5 dB and to full mute, in 0.5-dB steps.
The sine mode digital gain can be expressed as:
–DGAIN[7:0]/2 (dB) and are listed in Table 17.
Table 17. Sine Mode Digital Gain
SINEG[7:0] REGISTER
SINE MODE DIGITAL GAIN (dB)
0000 0000 (default)
0.0
0000 0001
–0.5
0000 0010
–1.0
…
…
1110 1111
–119.5
1111 0000
Full mute
…
Full mute
1111 1111
Full mute
SWM: Switch, Output Frequency
'M', and Range Bit Register (Address = 02h)
7
6
5
4
3
2
1
0
FREQ
SW2
SW1
SW0
M3
M2
M1
M0
Bit 7
FREQ: Frequency
This bit sets the sine mode output frequency range; see Equation 1.
Bits[6:4]
SW[2:0]: Switch control bits
These bits control the switch settings when the SW/TD input is high. When SW/TD is low, the register is
ignored and the switch is forced open. In digital input mode, the switch is controlled only by the register.
SW[2:0]
SWITCH DESCRIPTION
TERMINAL CONNECTIONS
000
Open (default)
All switches open
001
Differential
SWINP to SWOUTP and SWINN to SWOUTN
010
Differential reverse
SWINP to SWOUTN and SWINN to SWOUTP
011
Common-mode positive
SWINP to SWOUTP and SWINP to SWOUTN
100
Common-mode negative
SWINN to SWOUTP and SWINN to SWOUTN
101
Single-ended positive
SWINP to SWOUTP only
110
Single-ended negative
SWINN to SWOUTN only
111
Short
SWOUTP to SWOUTN
Bits[3:0]
M[3:0]: Sine mode frequency, M bits
These bits control the sine-mode output frequency. The output frequency is given in Equation 1.
Copyright
© 2011, Texas Instruments Incorporated
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