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DAC1282IPW 데이터시트(PDF) 15 Page - Texas Instruments

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부품명 DAC1282IPW
상세설명  LOW DISTORTION DIGITAL-TO-ANALOG CONVERTER FOR SEISMIC
PDF  43 Pages
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DAC1282IPW 데이터시트(HTML) 15 Page - Texas Instruments

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V
COM + VDIFF/2
V
COM
V
COM
VOUTP
VOUTN
V
COM + VDIFF/2
V
COM - VDIFF/2
V
COM - VDIFF/2
DAC1282
Output Frequency (Hz)
=
(1)
M[3:0] + 1
N[7:0] + 1
x
250
2
FREQ
DAC1282
www.ti.com
SBAS490
– DECEMBER 2011
SIGNAL OUTPUT (VOUTP, VOUTN)
As shown in Figure 34, the DAC provides a differential voltage (VDIFF = VOUTP – VOUTN) on pins VOUTP and
VOUTN. The output common-mode voltage (VCOM) is regulated to 100 mV below the midpoint of the analog
supply (AVDD
– AVSS).
Each signal output swings above and below the common-mode voltage. Best performance is realized when the
DAC output is used differentially. In power-down mode, the outputs enter a high-impedance, 3-state mode.
NOTE: VDIFF = VOUTP – VOUTN = ±2.5 V × Gain (VREF = 5 V).
VCOM = –0.1 V (±2.5-V supplies) or 2.4 V (5-V supply).
Figure 34. DAC Output Signal
The DAC output buffer is rated to drive up to a 2-nF capacitive load (maximum) and a 100-
Ω resistive load
(minimum). However, degradation of THD performance results in resistive loads less than 1 k
Ω, as shown in
Figure 26
The internal digital modulator generates the signal to drive the DAC. The modulator shapes the in-band noise to
high frequency and the frequency-shaped noise is present on the DAC output. However, the high frequency DAC
output noise is rejected by the digital filter of the ADC and does not affect system performance.
DAC MODES
The DAC1282 has four operational modes of: sine, dc, pulse, and external digital data input. These modes are
programmed by the MODE[1:0] bits in the GANMOD register, as shown in Table 1.
Table 1. DAC Modes
MODE[1:0] BITS
DAC MODE
00
Sine
01
DC
10
Digital data
11
Pulse
Sine Mode
In sine mode, the DAC1282 provides a sine-wave output. An internal signal generator develops the sine-wave
signal. The M[3:0], N[7:0], and FREQ register bits program the output frequency. The frequency range is
programmable from 0.4883 Hz to 250 Hz, as shown in Equation 1.
where:
M[3:0]
≤ N[7:0]
(1)
fCLK = 4.096 MHz. The signal frequency scales with fCLK.
(1)
Copyright
© 2011, Texas Instruments Incorporated
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