CXB1549Q datasheet(5/19 Pages) SONY

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CXB1549Q

Pad

No.

1.6 to 2.4

VCC2

3.3

VBB

Indicate

0.7 to 1.7

Differential PECL data

inputs pins.

These two inputs are

internally biased by

10k

Ω to VBB.

Positive power supply

pin for Data input circuit.

Reference bias voltage.

(Option)

The analog voltage high

impedance output pin

which indicate of whether

the optical power of

Laser diode is operated

normal

or not. The power output

range has following

relationship.

High Light Indication;

≥ 1.7V

Nominal Operation;

Vo = 1.2V

Low Light Indication;

≤ 0.7V

Symbol

Typical voltage [V]

Equivalent circuit

Description

300

200

10k

300

600

µA

600

µA

400

100k

VCC

VEE

14k

µA

Tset

Selector for output duty

cycle control pin.

This pin controls the

trailing edge of the input

high pulse. Variable

delay limit of that is from

0 to 0.2ns. Duty cycle is

controlled by connected

a resistor value between

Vcc and this pin.

Refer to Fig.1.

VCC

VEE

Rset

2.4k

20pF

µA

140

220

RSB

0.5

2.5

Window comparator

top/bottom threshold

voltage pin for

LD_ALARM.

The alarm (fail)

threshold assert voltage

can be set by the

external resistor.

Default voltages are

RS equal to 2.5V and

RSB equal to 0.5V.

VCC

VEE

100

µA

2.5k

20k

CXB1549Q 데이터시트(PDF) 5 Page - Sony Corporation

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