STULPI01A_12 datasheet(19/44 Pages) STMICROELECTRONICS

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STULPI01A, STULPI01B

Block description

Doc ID 14817 Rev 4

19/44

6.6

External charge pump

It is possible to use an external charge pump or power switch controlled by the PSWn pin

(active low open drain). This functionality is controlled by DrvVbus and DrvVbusExternal

ULPI OTG control register bits.

6.7

VBUS comparators and VBUS overcurrent (OC) detector

These comparators monitor the VBUS voltage.

VBUS valid status signals that the voltage is above the VBUS_VLD level (4.4 V). Session valid

status signals that the VBUS voltage is above the VSESS_VLD level (0.8 to 2.0 V). Session end

detector signals that VBUS voltage is below VSESS_END level.

The STULPI01 also implements an embedded VBUS overcurrent detector which compares

VBUS voltage to the external analog 5 V reference signal applied to the VB_REF_FAULT pin.

6.8

VB_REF_FAULT pin

VBUS overcurrent conditions can be monitored by either an internal or external OC detector.

The internal OC detector is enabled when the overcurrent_PD bit in the power control

this mode, the VB_REF_FAULT pin functions as the input of the analog reference for internal

overcurrent detector.

If the external charge pump is already equipped with an overcurrent detector, its output can

be also monitored through the VB_REF_FAULT pin, but the overcurrent_PD bit must be set

to 1b. In this mode, VB_REF_FAULT functions as the standard digital input pin with 5 V

tolerance. Functionality of the VB_REF_FAULT pin can be seen in more detail in Figure 6.

Note:

After reset, the overcurrent_PD bit is 1b, the internal overcurrent detector is disabled.

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